This invention relates in general to microprocessors and more particularly to a microprocessor which can utilize the internal bus to carry out not only data transfer but also logical operations such as logical product and logical sum operations.
Conventionally, the internal bus of the microprocessor has been used only for data transfer. On the other hand, a bus typical has a construction as described in Introduction to VLSI systems (1980), p. 157, FIG. 5.12, Precharged bus circuit. This bus construction will be described herein with reference to FIG. 2. For example, a high level signal is applied to a terminal .phi..sub.1 * Enable 1 to permit a signal at a source 1 to be transmitted to a bus line but low level signals are applied to terminals .phi..sub.1 * Enable 2 and .phi..sub.1 * Enable 3 to prevent transmission of signals at sources 2 and 3 to the bus line. Accordingly, if the high level signal is applied to two or more Enable terminals, data at the sources can be either ANDed or ORed. The type of the logical operation depends on the structure of the bus and in this example, logical sum can be achieved.
However, it has long been considered that if two or more pieces of data are placed on the internal bus of the microprocessor at a time, then there results a data conflict which prevents transfer of correct values.